例句與造句

1. Underwater data communication system s synchronization signal processing
   水聲數據傳輸系統(tǒng)中的同步信號處理
2. Two new speech detection methods based on neural networks using barker coded synchronization signal are presented
   提出了兩種采用巴克碼編碼同步信號并基于神經網絡的起點檢測新方法。
3. In this issue the different schemes mentioned above will be analyzed and the results are described by synchronization signal distribution intuitively
   通過分析，比較了兩種不同同步機制的不同性能，并用同步分布的方式對結果進行了直觀的表達。
4. It is conceived to introduce barker codes as synchronization preamble and add synchronization signal in front of speech signal to implement speech detection . the principle of this idea is presented
   提出了引入barker碼作為同步碼，在語音信號前添加同步信號以實現起點檢測的工作設想，并介紹了其同步原理。
5. The system employs multicarrier modulation ( mcm ) technique as the modulation method , and linear frequency modulation ( lfm ) signal as the synchronization signal and digital signal processor ( dsp ) as the hardware ' s core chip
   該系統(tǒng)選用多載波調制技術進行調制，選用線性調頻信號為其同步信號，選擇數字信號處理器為硬件核心芯片。
6. It's difficult to find synchronization signal in a sentence. 用synchronization signal造句挺難的
7. Synchronized drive module produces horizontal drive signal in synchronization with horizontal synchronization signal and field drive sawtooth in synchronization with vertical synchronization signal . these signal drive scaning sytem of slltv
   同步驅動模塊產生與行、場同步的行同步驅動信號和場鋸齒波驅動信號，用于驅動激光電視的掃描系統(tǒng)。
8. The results of experiment tell it is an effective method of share current . a strategy of synchronization control , which combines competition coequality and priority , is mentioned in the paper and uses digital phase - lock loop to track synchronization signal
   在同步控制上，應用了“優(yōu)先與搶占”的方式產生同步信號，純硬件實現，簡單可靠；使用了成熟的數字鎖相環(huán)來跟蹤同步信號。
9. Therefore , it is necessary to mount timing system alone in synchronization network node and the place where there are more telecommunication equipments and the important hinge , which supplies the primary synchronization signal conformed to the standard
   因此，有必要在同步節(jié)點處或通信設備較多的地方以及通信網的重要樞紐處，單獨設置時鐘系統(tǒng)，對所在的通信樓的設備提供合乎標準的同步基準信號。
10. Synchronization is the commander of every digital communication system , without it the system is unable to work orderly and correctly . a five - tuple of time - frequency diversity is adopted to guarantee that the synchronization signal be retrieved reliably in the receiver
    同步是任何數字通信系統(tǒng)有序工作的“指揮棒” ，本研究采用5重時頻分集的方法，使得在接收端能夠可靠地恢復出系統(tǒng)工作所需要的同步信號。
11. Bits supplies the synchronous timing signal to these equipments inside the telecommunicationt building , such as dps , atm , no . 7 , dxc , tm & adm in sdh , don and in etc . the related techniques are involved in the content of synchronization ne twork , timing distribution , the timing signal transportations x impairments etc . the second chapter tells the structure and the function of the building integrated timing system . the third chapter summarizes the digital synchronization network techniques , which emphasizes the basic concept of synchronization networks analyzes the necessity of building the synchronization network and introduces all kinds of synchronization methods . the fourth chapter represents the transportation of the synchronization signal
    本文第二章講述了通信樓綜合定時系統(tǒng)的構成及作用：第三章概述了數字同步網技術，著重描述了同步網的基本概念，分析了建立同步網的必要性，講述了各種同步方法；第四章闡述了同步定時信號的傳輸；第五章介紹了bits設備所支持的同步狀態(tài)消息；第六章、第七章為本文的重點，通過對時鐘信號建立數學模型，從理論上分析時鐘內部噪聲和相位瞬變產生時鐘定時信號損傷的原理，企圖尋找到更好地控制頻率漂移的方法。
12. Digital image processing consume a large amount of memory and time commonly . basing on the advantage of fpga , the paper design harware module by hdl ( hardware language ) , i . e . , some function is achieved by les ( logic element ) of the fpga . the real - time of digital image processing is achieved by this . the sample and display of digital image is the important part . so , the paper mainly design the sample and desplay module . the sample card is designed and it ’ s word mode is configured according china ’ s cvbs ( composite video bar signal ) . for acquiring the image and storing it correctly to sram , the paper design the sample - control module . the sample module can work correctly using least time . the reliability and real - time achieve the reference . according the vga principle and scheduling of the ths8134 , the paper design a vga - control module by hdl . firstly , the control signal is synthesized secondly , the horirontal and vertical synchronization signals is synthesized according to the vga interface standard
    圖像處理的特點是處理的數據量大,處理非常耗時,為實現數字圖像的實時處理,本文研究了在fpga上用硬件描述語言實現功能模塊的方法,通過功能模塊的硬件化,解決了視頻圖像處理的速度問題。圖像數據的正確采集和顯示輸出是其中的兩個重要的模塊,因此,本文主要完成了圖像數據的采集和顯示輸出的設計。本文設計了采集卡,并要對其工作模式進行了配置和編寫了采集控制模塊,在采集控制模塊的控制下,將數字圖像數據正確無誤的存儲到了sram中。
13. With these optical transceivers , the workstation on the shore can receive the synchronization signal for synchronization demodulation of pgc and controls the long - distance photoelectric modules under water . in this thesis , a long - distance optical transceiver is designed to meet the above requirements . beginning with the principle of optical communication , characteristics of the basic optical active device are summarized firstly
    為了實現pgc信號的同步解調與遠程水下光電模塊的監(jiān)控,岸基工作站與水下光電模塊需要通過光收發(fā)一體模塊進行低速率、無中繼的雙工通信,因此本課題的主要工作是進行遠程水下光收發(fā)一體模塊的設計與實現。
14. Based on the analysis of the driving theory of tft - lcd and the characteristic of lvds interface , we designed a drive circuit to control the horizontal / vertical synchronization signals and pixel signal , this drive circuit has a lvds interface . we make and debug the drive circuit by using performance - to - price fpga ep1c3t144 and lvds transmitting chip ds90c387
    在深入分析了液晶顯示器驅動原理和lvds接口特性的基礎上,基于fpga設計了控制顯示器行/場同步信號和顯示像素信號輸出lvds接口的驅動電路,并采用高性價比的fpga芯片ep1c3t144和lvds發(fā)送器芯片ds90c387制作和調試了相應的電路。
15. In this module , we focus on an improved 2 - d median - filter and a real time edge detect algorithm which has very regular computational structure . in chapter 4 , we use fpga to capture the image data from infrared sensor and create the synchronization signal and output the video to monitor . chapter 5 describes the design of communication interface between dsp , fpga and missile control system , and focus on a new verilog description style called cycle accurate , and finally we design an i2c bus using this description style
    本論文按照處理機的工作流程,首先討論fpga與視頻探測器之間的數據通訊模塊的設計,接著介紹了圖像預處理模塊,在預處理模塊中,重點介紹了一種改進的二維中值濾波方法和一種特別適于硬件實現的邊緣檢測算法;在第四章,討論了用fpga實現圖像獲取和模擬視頻輸出;第五章,討論了fpga與dsp之間以及fpga與彈上機之間的通訊模塊的設計,接著重點研究了一種新的verilog語言的描述風格,并用此寫法在上fpga實現對外圍設備的初始化模塊;最后,對本文所做的工作進行了總結。